TARGETS FOR PHYSICAL DESIGN/APR FLOW

• Targets of Floorplan

1. Stack the macros so that there is contagious space for Standard cells.
2. Entire design depends on quality of the floorplan.
3. Meet IR Drop as per specification.
4. Distribute the power all over the chip with minimum metal usage.

•  Targets of Placement

1. Design should be routable,Meet timing.
2. Reduce congestion,place blockages to avoid floating metals & wrong placement of standard cells.
3. Scan chain reordering 

• Targets of CTS

1. To meet signal transition, capacitance.
2. Meeting Global skew
3. Max fanout.
4. Clock domine buffer crossing.
5. Checking hold slack.

• Targets of Routing

1. Performing clock & signal routing with minimum metal jogging considering size of G-cell.